For example, in the semiconductor manufacturing process, a foreign substance on a wafer surface as a substrate and a pattern defect cause inferior products. For this reason, it is preferred that a monitor is implemented at all times of whether a problem is present in manufacturing devices and manufacturing environment, and the inspection apparatus has been used so that the defects, such as the foreign substance, pattern defect, appearance defect, etc., are detected to make them quantitative. It is also necessary to confirm whether the defect gives the product a fatal effect, by observing a defect shape etc. with use of an observing device.
In the past, the inspection condition necessary for inspecting the inspection apparatus has been provided such that a wafer is prepared for every layer type and layer thickness, formed on a substrate, standard particles of plural sizes are applied to all of the wafers, the wafers for every layer type and layer thickness, applied with the standard particles are inspected by the inspection apparatus, and an optimal inspection condition is generated for every layer type and layer thickness. For this reason, it has taken a great period of time and cost to generate the inspection condition for every layer type and layer thickness.
In recent years, the type of semiconductor device has rapidly increased with the case where the semiconductor devises are currently diversified. A frequency of generating the number of inspection condition and the inspection condition necessary for inspecting the defect, has also increased rapidly. Further, since the inspection condition has been subjected to a complicated effect due to a defect inspection apparatus having high performance, the cost and time necessary for generating the inspection condition of the defect inspection apparatus are increased more and more. Therefore, it has been demanded to reduce an operation of generating the inspection condition in the defect inspection apparatus. For example, a patent literature 1 discloses an inspection system for a purpose of acquiring efficiency for an inspection time and a manufacturing method of a semiconductor device, by using a classification of wafer lots and a feedback to a recipe.